The present invention relates to the manufacture of integrated circuits. Specifically, a system for heating semiconductor substrates in a controlled pressure and temperature environment is disclosed.
The manufacture of integrated circuits, such as metal oxide semiconductors (MOS), requires rapid thermal processing of semiconductor wafers in a controlled pressure environment, such as vacuum. For instance, in the process of forming MOS transistors, the gate oxide layer is typically formed by thermal oxidation of a silicon substrate in a substantially pure oxygen atmosphere. However, in certain applications such as MOS ULSI circuits, the gate oxide layers can exhibit undesirable characteristics, such as relatively high defect densities and charge trapping, along with relatively low reliability and resistance problems due to hot carrier effects.
It is known that the gate dielectric characteristics of MOS transistors can be improved using a sequence of rapid thermal processing (RTP) of the silicon substrate. These processing steps include: (1) creating an oxynitride growth with nitric oxide (NO); (2) applying silicon nitride (SiN) with a chemical vaport deposition (CVD) process; (3) annealing with ammonia (NH3); and (4) annealing with N2O. The various RTP processing steps are conducted generally in a vacuum with a controlled temperature. An RTP oven is partitioned with quartz windows defining a central vacuum chamber that holds a wafer to be heated by multiple arrays of radiant heating lamps. The quartz windows separate the wafers from heating lamps and other sources of contaminants during the heating process. The edges of the quartz windows are sealed with the chamber walls to form an air-tight chamber enclosure. When a vacuum is drawn in the chamber, an atmospheric force between two and four tons is produced against the quartz windows. The quartz windows are thick enough to withstand this force, and are generally at least about 25 mm to 35 mm thick. Thinner quartz windows, generally at least about 3 mm to 6 mm thick, are used only for chambers that operate at atmospheric pressures.
The quartz window isolation chamber structure, while maintaining the inner chamber environment clean of contaminants, introduces a large thermal mass between the heating source (lamps) and the wafer within the chamber, making heating less efficient and wafer temperature control more difficult. The additional thermal mass makes it difficult to maintain process repeatability and quality control. The quartz windows, due to their thickness, are subject to breakage, and add significant cost to the RTP apparatus. Accordingly, a system for rapid thermal processing which avoids the complications, expense, and repeatability problems created by quartz window-based ovens would be desirable.
Moreover, efforts to increase throughput for semiconductor wafer RTP processing have yielded certain alternatives other than lamp-based heating. Mattson Technology offers an ASPEN II RTP system that processes two wafers in a single process chamber using susceptor-based heating. U.S. Pat. No. 6,133,550 discloses a method for RTP processing wafers by rapidly inserting and removing them from a furnace. Increasing wafer size and increasing stresses on larger and larger chamber windows for chambers to accommodate larger wafers have limited the potential for increasing throughput for lamp-based RTP systems by processing multiple wafers in a chamber. Accordingly, a system for lamp-based rapid thermal processing that permits increased wafer throughput would also be desirable.
The rapid thermal processing (RTP) system according to the invention provides a controlled pressure and temperature environment for processing substrates, such as semiconductor wafers and integrated circuits. The apparatus includes a heating chamber and an array of heat lamps that generate radiant heat for maintaining the temperature of a semiconductor wafer held within the chamber at a selected value or range of values according to a desired heating recipe. Each heat lamp includes a bulb, and at least such bulb is surrounded by an optically transparent enclosure that isolates the bulb from the interior of the chamber and the wafer therein. Preferably, the optically transparent enclosure is formed from quartz and has a surface completely or substantially transparent to the radiant heat energy emitted by the bulb. By isolating the chamber interior and the wafer therein from the bulb and associated components of the heating lamp, the optically transparent enclosure helps prevent contaminants from the heating lamps from entering the chamber or being deposited on a semiconductor wafer in the chamber.
In another aspect of the invention, improved temperature control is realized by using heat lamps with bulbs having a reflector surface disposed over at least a portion of the bulb surface or disposed over at least a portion of the optically transparent enclosure. The reflectors help to control and direct radiation from the lamps to the surface of a semiconductor wafer under process. Alternatively, the reflector surface may be found on the wall of the chamber, particularly within a cavity in the chamber wall with a concavely-shaped or parabolic-shaped inner surface. When the heat lamps are positioned within the cavity, the reflector surface on the cavity wall helps to control and direct radiation from the lamps to the surface of a semiconductor wafer under process.
In a preferred embodiment, the optically transparent enclosure surrounding the bulb is formed into a lens structure that concentrates the radiant heat emitted from the bulb onto the semiconductor wafer surface. The lens structure may be formed as a convexly-curved cover over the opening to the cavity in the chamber wall when the heat lamp is held within such cavity. Alternatively, the lens structure may be formed as a sold block or piece of optically transparent material, such as quartz, with an open inner core portion to house a heat lamp, wherein one side surface of said block is formed into a convexly-shaped or concavely-shaped lens to direct or control radiant heat energy emitted from the bulb toward a semiconductor wafer being processed.
In yet another embodiment of the invention, an optically transparent liner is interposed between an array of the enclosed heating lamps and the single wafer or multiple wafers in the processing chamber enclosure. The optically transparent liner is provided in addition to the optically transparent enclosures surrounding the bulbs, and further isolates the bulbs from the wafer to further restrict contaminants from reaching the wafer surface. The optically transparent liner differs from the quartz windows of the prior art because it is not sealed to the chamber sidewalls, and may therefore be formed as a thinner piece because it does not need to withstand great pressure differentials when a vacuum is drawn in the chamber. If the optically transparent liner is sealed to the chamber sidewalls, a series of valves are provided in addition to the pump to equalize the pressures of each side of the liner, thereby preventing damaging forces that otherwise would be caused by pressure differentials. Alternatively, to avoid undue stresses, a series of multiple optically transparent liners with smaller surface areas may also be used in combination with the bulbs.
Still other objects and advantages of the present invention will become readily apparent to those skilled in the art from the following detailed description of the preferred embodiments of the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the description is to be regarded as illustrative in nature and not as restrictive.